I'm installing a package but that package doesn't has "makeFile" file, it only has "makefile.am" and "makefile.in". therefore when ever i use the "make" command i get: "make: *** No targets specified and no makefile found. Stop."
View 2 RepliesI just downloaded slackware 13.1(x86) and i'm trying to compile ndiswrapper-1.56 using the slackbuild from slackbuils.org and i'm getting this error:
Code:
Makefile:535: /usr/src/linux-2.6.33.4/arch/i486/Makefile: No such file or directory
make[2]: *** No rule to make target `/usr/src/linux-2.6.33.4/arch/i486/Makefile'. Stop.
make[1]: *** [modules] Error 2
make: *** [all] Error 2
looks like the folder i486 doesn't exist
I am a beginner in Linux. Never did any kernel programming in Linux/Windows before. I am now on a project and I am supposed to understand a Linux Device Driver Code. It contains 6 .c files and 1 Makefile.
The make file goes as this:
I have a.c b.c c.c d.c d.c e.c f.c in the director along with the Makefile mentioned.
I am using Fedora Red Hat Linux 32 bit.
How to compile the Makefile.
I needed an open source alternative to after effects so i went for jahshaka but after following the instructions, i type in 'make' and hit return and it says "make: *** No targets specified and no makefile found. Stop." am i missing something obvious? i have looked around the web, but no-one has this problem that i can find i am using ubuntu 10.04.
View 2 Replies View RelatedI have problems with linking object files.
This is what I get:
Is it possible to debug a makefile? In a bash script I can use "set -x" so that all variables are shown with their values. I am looking for such feature in makefile to see the variables and their values.
View 2 Replies View RelatedI want to define _LINUX in my makefile which I would be using in my source code like #if _Linux. I do not want to #define _Linux __linux__ in my source code.
View 2 Replies View Relatedat present I compile the same code for different systems (cross compilers)I need to call libs and include paths for the different processors. At present I simply comment out the paths not needed
eg
#INCDIR = -I/cross1/.......
#INCDIR = -I/cross2/.......
[code]....
I don't know whether this is happening because my machine is behind an HTTP proxy, or for some other reason. When I enter my Ubuntu One account name and pass into "Connect to Ubuntu One" and click Connect, I get this code error instantly:
Code: 'NoneType' object has no attribute 'makefile' If I enter nothing or invalid data into these fields, a red icon is displayed immediately, but the error above appears with valid and accurate data in the fields. If this is a proxy issue, why doesn't the application honor the system-wide proxy settings?
I seem to be running into this issue a lot when installing various programs. I downloaded and installed a tar file (Linux Wacom Project. xf86-input-wacom-0.32.0 specifically) for my Bamboo tablet. Here's what I did:
Code: Select allsudo apt-get install build-essential
Looks like everything went well, but it asked me for a CD?... I just ignored that and went to the next step in the guide.
Code: Select allsudo apt-get build-dep wacom-tools
Looks like everything went well here. But near the end I get this...
Code: Select allchecking for doxygen... no
configure: WARNING: doxygen not found - documentation targets will be skipped
checking for rint in -lm... yes
checking for XORG... no
configure: error: in `/home/mason/Desktop/xf86-input-wacom-0.32.0':
configure: error: The pkg-config script could not be found or is too old. Make sure it is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config.
Alternatively, you may set the environment variables XORG_CFLAGS and XORG_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details.
I didn't really pay attention to THAT until I do...
Code: Select allcd ~/Desktop/linuxwacom-0.8.8-6
./configure --prefix=/usr
make
Where in I get this error message after I enter in Code: Select allmake at the terminal
Code: Select allmake: *** No targets specified and no makefile found. Stop.
Try to understand a Makefile. It has (all: $(VAR1) $(VAR20) Makefile). What does this "Makefile" mean?
View 2 Replies View RelatedI have a linksys AE1000 wireless adapter, I have the proper driver, and I was able to install it on ubuntu to by typing cd (directory) make make install On Fedora 13 when i type su Cd (directory) make I get this after i hit enter after i type make
[root@Renegade wireless]# make
make -C tools
make[1]: Entering directory `/home/Renegade/wireless/tools'
gcc -g bin2h.c -o bin2h
[code].....
can anybody tell the use of make file in Nis server.
View 1 Replies View RelatedI have encountered some cases that the ./configure log says:
config.status: creating xxx/Makefile
but when make fails on:
...
make[2]: Entering directory xxx
make[2]: *** No rule to make target `all', Stop
...
and xxx/Makefile is absent in the disk. Why does it happened?
in directory a_dir, have a file named a_file.i can type "source a_file" under directory a_dir and execute successfully.but if i write the command to a Makefile under directory b_dir, the "source" function can't be executed well. it will generate some error message like this:
./a_file: line 1: setenv: command not found
./a_file: line 2: setenv: command not found
./a_file: line 3: setenv: command not found
./a_file: line 5: setenv: command not found
I want to write simple non recursive makefile, but I am not getting syntax of it. Please give me example with simple description. I had read docs, html's but I am not getting how that works please give simple example. consider I have following directory structure.
[Code]...
I need to write an else-if condition in a makefile, and though the format is posted on several websites, nothing seem to be working, andI get an error everytime. Could anybody please write a small example with an else-if conditional in a maekefile?
View 1 Replies View RelatedI'd like to write a top-level Makefile, and define environment variables further in deeper Makefiles:
/tmp# cat main.mk
Code:
export TEST=dummy
/tmp# cat sub.mk
Code:
include main.mk
[Code]...
1. How to complement an environment variable to add data as we chain multiple Makefiles?
2. How to actually export variables from Makefiles so that they are available in other Makefiles?
I download a package of tar.gz ...
1:firstly I extract it on desktop
2:Then use cd command and go to extracted folder
3:To install that package i use
sudo make install. Then I got a error message
"make: *** No targets specified and no makefile found. Stop."
I'm trying to write a make file to deploy software in a production setup.
The first thing I'm trying to do is detect if the user running the make is root.
From the documentation scattered about, I came up with this:
Code:
USERID=$(shell id -u)
all:
$(info User Id is $(USERID))
ifeq ($(REQUIRED_USER),0)
$(info Running as root... OK)
[Code]....
As you can see, in both situations, make executes both branches of the conditional.
I'm compiling some applications in a pc, using:
Code:
./configure
make
make install
but I want to run the applications in another pc, so I have used the option --prefix=/some/directory/ when executing ./configure, so I could just copy this folder to the other pc. However, my programs now need to have libraries and shared files in the same location that I used with --prefix, instead of /lib, /usr, etc.
Makefile.in a file that is generated by tool, why it is in the source package? I am asking since , when I modified Makefile.am, I need to run automake to update the makefile.in, while I don't think this should be done manually.
View 2 Replies View RelatedHow to create a simple Makefile using C....
View 3 Replies View RelatedI'm trying to figure out how Make handles directories.
How can I modify this makefile so it will put all of the .o files in a separate build directory?
Code:
But make ignores this and still puts main.o in the base directory. And if I refer to the build directory in the dependencies for bandit, make complains about "no rule ..."
I want to keep main.cpp in the base directory, all other sources in the src directory, and all object files in the build directory.
When I put a "test" target in my Makefile containing
Code:
@echo "CXX= $(CXX)"
it tells me "CXX= g++".
But I have nothing in the Makefile assigning any value to CXX, and as far as I can tell I have no CXX environment variable (no "CXX" appears when I run the shell command "env", and "echo $CXX" returns a blank line. So where's the g++ value coming from. Is this just built into Gnu Make, or is there a configuration file for make somewhere?
I've been trying to figure out how to use make and makefile to compile and link some .cpp/.h. All i seem to find on google says to read the README for the software. But this is my own created c++ project. Im just looking for a simple makefile for my own .cpp/.h files( about 20 total).
I have tried using 2 different makefile "examples" as a template, but neither worked. I am getting error saying "file1.cpp: no newline character at end of file". or something to that degree.
I am trying to run a script to setup environment variables and then run other commands in a make file. But the source or the dot operator (shell is bash) does not seem to take any effect as the subsequent command didn't pick the environment up. Do I have to put every lines of the environment setup in the first script into the makefile instead?
sample setenv.sh
#!/bin/sh
export MYDIR=/somedir
sample makefile:
all: source ./setenv.sh
echo $(MYDIR)
I can find all kinds of information on calling a script from a makefile but not the other way around.I'm writing a VERY basic shell script, and I need to call a makefile located in a directory lower than the shell script but can't seem to figure it out../dir/make and ./dir/makefile don't work.
View 2 Replies View RelatedDoes anyone know if it is possible to make rules in a Makefile that would work like this:
> make debug module
or
> make module debug
where module can be any module that has a specific rule in the Makefile.
The thing I have is a Makefile with different rules that I compile like this:
> make module
What I would like is to add an option so I can compile whichever module with debug-information just by adding a debug to the make command. The debug-information I know how to do, the problem is how to make the Makefile work...
How to compile single file in Linux environment using gcc. Now i dont know how to use make file to compile multiple file.
View 5 Replies View Related