Programming :: MY_DEFINES In Makefile

Jul 20, 2010

I want to define _LINUX in my makefile which I would be using in my source code like #if _Linux. I do not want to #define _Linux __linux__ in my source code.

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Slackware :: Makefile:535: /usr/src/linux- No Such File Or Directory

May 31, 2010

I just downloaded slackware 13.1(x86) and i'm trying to compile ndiswrapper-1.56 using the slackbuild from and i'm getting this error:


Makefile:535: /usr/src/linux- No such file or directory
make[2]: *** No rule to make target `/usr/src/linux-'. Stop.
make[1]: *** [modules] Error 2
make: *** [all] Error 2

looks like the folder i486 doesn't exist

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Programming :: Makefile Flags ?

May 19, 2010

I have problems with linking object files.

This is what I get:

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Programming :: Set Different Paths In Makefile?

Oct 8, 2010

at present I compile the same code for different systems (cross compilers)I need to call libs and include paths for the different processors. At present I simply comment out the paths not needed

#INCDIR = -I/cross1/.......
#INCDIR = -I/cross2/.......


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Installation :: How To Use A Makefile - Kernel Programming

Feb 25, 2009

I am a beginner in Linux. Never did any kernel programming in Linux/Windows before. I am now on a project and I am supposed to understand a Linux Device Driver Code. It contains 6 .c files and 1 Makefile.

The make file goes as this:

I have a.c b.c c.c d.c d.c e.c f.c in the director along with the Makefile mentioned.

I am using Fedora Red Hat Linux 32 bit.

How to compile the Makefile.

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Programming :: Create A Simple Makefile Using C ?

Mar 26, 2011

How to create a simple Makefile using C....

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Programming :: Makefile - Handles Directories ?

Dec 8, 2009

I'm trying to figure out how Make handles directories.

How can I modify this makefile so it will put all of the .o files in a separate build directory?


But make ignores this and still puts main.o in the base directory. And if I refer to the build directory in the dependencies for bandit, make complains about "no rule ..."

I want to keep main.cpp in the base directory, all other sources in the src directory, and all object files in the build directory.

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Programming :: Makefile - No CXX Environment Variable

Jan 6, 2010

When I put a "test" target in my Makefile containing
@echo "CXX= $(CXX)"
it tells me "CXX= g++".
But I have nothing in the Makefile assigning any value to CXX, and as far as I can tell I have no CXX environment variable (no "CXX" appears when I run the shell command "env", and "echo $CXX" returns a blank line. So where's the g++ value coming from. Is this just built into Gnu Make, or is there a configuration file for make somewhere?

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Programming :: Source Or Dot Command Not Working In Makefile

Apr 5, 2010

I am trying to run a script to setup environment variables and then run other commands in a make file. But the source or the dot operator (shell is bash) does not seem to take any effect as the subsequent command didn't pick the environment up. Do I have to put every lines of the environment setup in the first script into the makefile instead?

export MYDIR=/somedir

sample makefile:
all: source ./
echo $(MYDIR)

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Programming :: [Makefile] Run Command Conditionally In Target?

Nov 25, 2010

I'm learning about how to write Makefiles, and am a bit lost at how to run a command in a target depending on the value of a variable.

What I'm trying to do, is run "strip" only if the user is running a given version of a C compiler.

Here's the code:

$(LUA_T): $(LUA_O) $(LUA_A)
$(CC) -o $@ $(MYLDFLAGS) $(LUA_O) $(LUA_A) $(LIBS)
#FDPIC ELF binaries can be stripped, but not FLAT binaries
$(STRIP) $@

Does someone know the correct way to do this?

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Programming :: Automake Error - Cannot Open > Py/

Jun 25, 2011

I am new to automake. When running automake command, there is an error "cannot open > py/ No such file or directory". How to create that file? And, what is that file for?

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Programming :: C++ - Where To Place Library Flags In A Makefile?

Apr 10, 2011

If I would normal compile using the following line:


Where should those library flags go in a makefile? Say I having the following makefile:


all: ${PROGS}


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Programming :: Calling Gcc From Executable File / (makefile)

Oct 4, 2010

I am trying to use a software package written in ANSI C. It has a makefile which has to be executed first.

As soon as I execute it I get messages like: line i: command not found.

Commands for which I am getting errors :

CC = /usr/bin/gcc
GCCFLAGS = -c -Wall

My gcc compiler is located in the above directory only. In ROOTDIR also I tried giving the path in which all the required files & folders are present but still I get the command not found error in all the lines.

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Programming :: Makefile Error Shown Only By Eclipse?

Apr 26, 2010

I created a quick makefile with the following lines:


echo "----- Linking $(BINARY)----"
gcc -m32 -g src/* -Iinclude -I$(HOME)/include -I$(HOME)/include2 -D_LINUX -DSYSV -DPOSIX -L$(HOME)/shared/lib32 -lidlib -lid2lib -o bin/sampleapp
echo "---- done ----"

It builds fine when I build from the command line ( make -f

However, it does not build when building from eclipse (which essentially calling the same makefile). The make output shows exactly the same as what I got from the command line build, except the last line showing


collect2: cannot find 'ld'
make: *** [sampleapp] Error 1

I am not sure why it tries to call "ld" when building from eclipse.

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Programming :: Write A Makefile For CUDA/C++ Code?

Jun 19, 2010

I'd like to write a Makefile for my CUDA/C++ code but I didn't know how things work with CUDA, I mean there is a nvcc compiler but I don't know what I've got to do with this.
Do I have to firstly run nvcc and then g++ or only nvcc to compile my CUDA/C++ code ? I found nothing on the web explaining such basic things .

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Programming :: Makefile Index Of List Element?

Apr 5, 2011

So I have been trying for 8 hours to try to get the index of an element from a list in a Makefile. The problem is that after I get the index using all the methods I have tried, the index cant be used in the "word" function:

for instance:
$(OUTPUT2) : INDEX = $(shell echo $(OUTPUT2) | sed -r -e "s/[ ]+/
/g" | grep -n $@ | sed 's/^([0-9]*):.*/1/')

will create a variable INDEX defined specifically for each member of OUTPUT2, so that each output knows its index. Unfortunately, when I pass this $(INDEX) into word, it doesn't work:

$(OUTPUT2) : $(word $(INDEX), $(INPUT1)) $(word $(INDEX), $(INPUT2))
echo $(INAME) $(TMPBASE) $@
and I get the error:
Makefile:16: *** non-numeric first argument to `word' function: 'num'. Stop.

I feel like if I could just convert a string to a Makefile acceptable number this would just work....

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Programming :: Finding Path Of Sourcefiles In Makefile?

Mar 13, 2009

im trying to write a makefile which contains :two cpp files and two header files. now i've put cppfiles in a folder called source whose path is: /root/workspace/source and header files in a folder called header whose path is:


my makefile is in the path:/root/workspace/makedemo my makefile was like this:


HEADERS = $(shell /root/workspace/makedemo/header ls *.h)
SOURCES = $(shell /root/workspace/source ls *.cpp)


im sure that i've given the correct path but it is showing errors like this:

[root@localhost makedemo]# make
/bin/sh: /root/workspace/source: is a directory
/bin/sh: /root/workspace/source: is a directory
g++ -W -Wall -I. -o output
g++: no input files
make: *** [output] Error 1

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Programming :: Generating Makefile Ans Configure Script ?

May 17, 2011

I know how to manually writing a makefile for my project, but I am new in using makefile & configure file generation tools like automake to generate a makefile and a configure script file.

I had done research on tutorials for generating makefile and configure script file.

I know that I need to manually write two files ( and

I use wxWidgets GUI library, libconfig library, and libpcap library to do my project.

wx-config is a tool that can return the library files and include directory for wxWidgets library.

When using g++ to compile my files, I need to add in this line "`/wxlib/bin/wx-config --version=2.9 --static=yes --unicode=yes --debug=yes --libs`"

How to add that line to the file?

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Programming :: Make Recursive Makefile Work?

Jun 8, 2011

I'm trying to make recursive makefile work but it's giving me two problems. I have a top folder with the main Makefile and one Makefile for each sub folder 'one' and 'two'. Makefile in subfolder 'one' and 'two' are identical. The top Makefile (still a bit messy) looking like this:

# Directories
CC = gcc
CFLAGS = -Wall -Wextra
MAIN_FILE = one.c


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Programming :: Tell Makefile Not To Compile Debug Code?

Mar 4, 2010

I've been trying to work out a way to stop chunks of code being compiled using a variable in my makefile but can't work it out. What I mean is for example in my code I might have.

/****output comms portdata********/
debug comms port %d",ReadPort("ttys1);

I only wish this code to be compiled when I'm debugging. What I've tried is using #ifdef with

debug comms port %d",ReadPort("ttys1);

Then in my make file I set COMM_PORT_DEBUG to 1 so


I then thought I could put it into my in my link line


but this gives a

gcc: COMM_PORT_DEBUG=1: No such file or directory

is there a way to do this sort of thing? Or am I barking up the wrong tree?

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Programming :: Fortran 90 Code - Makefile Insensitive To Change

Mar 10, 2011

I am dealing with one FORTRAN 90 code, have made small changes.

milenko@milenkons:~/mt4$ make mt4
make: 'mt4' is up to date.
milenko@milenkons:~/mt4$ ifort -c MT2DDIB1.FOR
milenko@milenkons:~/mt4$ make mt4
make: 'mt4' is up to date.
milenko@milenkons:~/mt4$ make mt4
make: 'mt4' is up to date.
milenko@milenkons:~/mt4$ make mt4
make: 'mt4' is up to date.

I go for make command but it does not see that the source code has been modified.Than I do compilation from command line,try make again but no use.

mt3: driver_mt2ddi.o constants.o settings.o params.o mt2dmod.o fdsystem.o mt2ddat.o mt2dsens.o
$(F95) -o $(FFLAGS) mt3 constants.o settings.o params.o mt2dmod.o fdsystem.o mt2ddat.o mt2dsens.o driver_mt2ddi.o
driver_mt2ddi.o: driver_mt2ddi.for constants.o settings.o params.o mt2dmod.o fdsystem.o mt2ddat.o mt2dsens.o
$(F95) -c $(FFLAGS) driver_mt2ddi.for

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Programming :: Addition Of A Static Library(libtimer.a) In Makefile?

Feb 10, 2010

The following is my Makefile, I wanted to add a staic library named libtimer.a. I'm using the following Makefile. Please let me know how to add this static library:



all:gcc -Wall -lrt -lm -pthread usbserialapp.c usbserialinit.c environ.c -o usbserial

It produces "usbserial" executable.

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Programming :: Exporting Makefile Variables To $(shell) Environment?

May 12, 2010

I'm aware that one can export make variables to other makefiles; however, how does one export them to the environment of $(shell)? Take the example below:

export TEST
VARIABLE=$(shell echo $$TEST)
.PHONY: all

In this example, I might call make TEST=test. The goal is for $TEST to be available to the environment of the shell escape. This is because I need its value in a script which is called. For example:

VARIABLE=$(shell current solution is the following:VARIABLE=$(shell export TEST="$(TEST)"; but this only works if I know all if the variables needed at that point (as opposed to being able to export variables in included makefiles.) Is there an easy solution?

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Programming :: Compile And Build Program Using A Makefile Template?

Jul 8, 2011

I am new to the whole concept of makefiles, and I'm trying to compile and build my program using a makefile template I have found. My project consists of three directories: "source", where my .cpp files are (source1.cpp, source2.cpp, source3.cpp), "include", where my .h files are (header1.h, header2.h, header3.h), and "obj", where the object files are to be stored (obj1.o, obj2.o, obj3.o). In the project root directory is my makefile, which is as follows:

EXEC = myexe
CC = g++
IDIR = include
SDIR = source
ODIR = obj


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Programming :: 'makefile' \ Errors Are Mainly Due To Multiple Declarations Of The Functions?

Nov 24, 2010

This is the makefile....

animesh:main.o input.o bsort.o output.o
gcc -o animesh main.o input.o bsort.o output.o


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Programming :: Compiling Recursive Makefile In Directory Structure

May 18, 2011

I'm having problems with compiling recursive Makefiles in my directory structure:
My folder layout is:
top/|- one/|- one.c (With main function)|- zero.c|- two/|- two.cin my top folder the make file looks like:

.PHONY: all

@echo $@
$(MAKE) --directory=$@
in my one and two folder I have the following Makefile:

.PHONE: all
@echo $@
$(CC) $(CFLAGS) *.c
But when I compile it from top folder: make

I get following output:
Which states that directory statement by echo in main Makefile is ok but the files are not compiled in one and two.

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Programming :: Makefile: Change Compilation Flags By Changing Target Name

Nov 12, 2010

I'd like to create a target named "debug" or something similar which will use some special optimization flags useful when debugging (for example -ggdb). At the moment my makefile is neat (which I like) and looks like

SRC = $(wildcard *.cxx)
OBJ = $(SRC:.cxx=.o)
LIB = -lm


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Programming :: Makefile Error - No Rule To Make Target Modules

Mar 30, 2010

anisha@linux-p0mg:~> uname -r && cat /etc/*release
openSUSE 11.0 (i586)
VERSION = 11.0
My small Makefile:

obj-m += serialPortISR.o
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
Errors I receive:

anisha@linux-p0mg:~/Desktop/serialPortISR_31_10_09> make
make -C /lib/modules/ M=/home/anisha/Desktop/serialPortISR_31_10_09 modules
make[1]: Entering directory '/usr/src/linux-'
make[1]: *** No rule to make target `modules'. Stop.
make[1]: Leaving directory '/usr/src/linux-'
make: *** [all] Error 2

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Programming :: Build An Object Code For ARM At91rm9200 Board From A Makefile Using A Crosscompiler?

Apr 17, 2011

I want to build an object code for ARM at91rm9200 board from a Makefile using a crosscompiler.

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Programming :: Makefile - Error When Run The Make Run - No Rule To Make Target - Shell.h

Sep 15, 2010

I want to gave much details as possible. working directory (~/a1/shell) in the shell directory i have Makefile. also in the shell directory i have subdirectory's (obj, src, include)

My current Makefile


#What needs to be built to make all files and dependencies


# End of Makefile

I wanted it so: all .o files are created in the obj subdirectory, and my application, sshell, is created in the shell directory.

I am getting this error when i run the make run: No rule to make target 'shell.h', needed by 'shutil.o'. stop

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